dn3135 features high input impedance low input capacitance fast switching speeds low on resistance free from secondary breakdown low input and output leakage applications normally-on switches solid state relays converters linear ampli? ers constant current sources power supply circuits telecom ? ? ? ? ? ? ? ? ? ? ? ? ? general description the supertex dn3135 is a low threshold depletion-mode (normally-on) transistor utilizing an advanced vertical dmos structure and supertexs well-proven silicon-gate manufacturing process. this combination produces a device with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coef? cient inherent in mos devices. characteristic of all mos structures, this device is free from thermal runaway and thermally-induced secondary breakdown. supertexs vertical dmos fets are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. absolute maximum ratings parameter value drain-to-source voltage bv dsx drain-to-gate voltage bv dgx gate-to-source voltage 20v operating and storage temperature -55 o c to +150 o c soldering temperature* 300 o c absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied. continuous operation of the device at the absolute rating level may affect device reliability. all voltages are referenced to device ground. *distance of 1.6mm from case for 10 seconds. ordering information bv dsx / bv dgx r ds(on) (max) i dss (min) package options to-236ab 1 to-243aa 2 350v 35 180ma dn3135k1 dn3135n8 dn3135k1-g DN3135N8-G -g indicates package is rohs compliant (green) notes: 1 same as sot-23, 2 same as sot-89. n-channel depletion-mode vertical dmos fets pin con? gurations to-243aa (top view) g d s d product marking for to-243aa: where = 2-week alpha date code dn1s product marking for to-23 6ab: where = 2-week alpha date code n1s to-236ab (top view) g s d
2 dn3135 90% 10% 90% 90% 10% 10% pulse generator v dd r l output d.u.t. t (on) t d(on) t (off) t d(off) t f t r input input output 0v v dd r gen 0v -10v electrical characteristics symbol parameter min typ max units conditions bv dsx drain-to-source breakdown voltage 350 - - v v gs = -5.0v, i d = 100a v gs(off) gate-to-source off voltage -1.5 - -3.5 v v ds = 15v, i d = 10a v gs(off) change in v gs(off) with temperature - - 4.5 mv/ o cv ds = 15v, i d = 10a i gss gate body leakage current - - 100 na v gs = 20v, v ds = 0v i d(off) drain-to-source leakage current - - 1.0 a v ds = max rating, v gs = -5.0v - - 1.0 ma v ds = 0.8 max rating, v gs = -5.0v, t a = 125 o c i dss saturated drain-to-source current 180 - - ma v gs = 0v, v ds = 15v r ds(on) static drain-to-source on-state resistance --35v gs = 0v, i d = 150ma r ds(on) change in r ds(on) with temperature - - 1.1 %/ o cv gs = 0v, i d = 150ma g fs forward transconductance 140 - - mmho v ds = 10v, i d = 100ma c iss input capacitance - 60 120 pf v gs = -5.0v, v ds = 25v, f = 1mhz c oss common source output capacitance - 6.0 15 c rss reverse transfer capacitance - 1.0 10 t d(on) turn-on delay time - - 10 ns v dd = 25v, i d = 150ma, r gen = 25?, v gs = 0v to -10v t r rise time - - 15 t d(off) turn-off delay time - - 15 t f fall time - - 20 v sd diode forward voltage drop - - 1.8 v v gs = -5.0v, i sd = 150ma t rr reverse recovery time - 800 - ns v gs = -5.0v, i sd = 150ma notes: 1.all d.c. parameters 100% tested at 25 o c unless otherwise stated. (pulse test: 300s pulse, 2% duty cycle.) 2.all a.c. parameters sample tested. thermal characteristics package i d (continuous) 1 i d (pulsed) power dissipation @t a = 25 o c jc ( o c/w) ja ( o c/w) i dr 1 i drm to-236ab 720ma 300ma 0.36w 200 350 72ma 300ma to-243aa 135ma 300ma 1.3w 2 34 97 2 135ma 300ma notes: 1. i d (continuous) is limited by max rated t j . 2. mounted on fr4 board, 25mm x 25mm x 1.57mm. signi? cant p d increase possible on ceramic substrate. switching waveforms and test circuit
3 dn3135 3-lead to-236ab (sot-23) package outline (k1) 2 0.0173 0.0027 (0.4394 0.0685) 0.0906 0.0079 (2.299 0.199) 0.0754 0.0053 (1.915 0.135) 0.0512 0.004 (1.3004 0.1016) 0.0207 0.003 (0.5257 0.0762) 0.115 0.005 (2.920 0.121) 0.0400 0.007 (1.016 0.178) 0.0210 0.003 (0.5334 0.076) 0.0382 0.003 (0.9690 0.0762) 0.0035 0.0025 (0.0889 0.0635) 0.0043 0.0009 (0.1092 0.0229) nom 0.0197 (0.50) dimensions in inches (dimensions in millimeters) measurement legend = 3 1 top view side view end view
4 doc.# dsfp-dn3135 a012307 dn3135 (the package drawing(s) in this data sheet may not re? ect the most current speci? cations. for the latest package outline information go to http://www.supertex.com/packaging.html .) exclusion zone no vias/traces in this area. shape of pad may vary. 3.00 bsc 1.50 bsc 0.5 0.06 0.42 0.06 1.05 0.15 2.45 0.15 4.10 0.15 1.72 0.10 4.50 0.10 2.21 0.08 0.40 0.05 1.50 0.10 notes: all dimensions are in millimeters; all angles in degrees. top view side view bottom view 3-lead to-243aa (sot-89) surface mount package (n8)
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